GDC21D003 Datasheet, PDF (27/77 Pages) Hynix Semiconductor – VSB Receiver

Address 65:
[7:0] Err_count[7 : 0] R Lower 8 bits of Segment error counter output
Address 66:
4
Data_out_en
[3:0]
Tri-state data out
W
‘1’ : normal operation
‘0’ : high impedance
Initial is ‘1’.
R don’t care
Address 67:
[7:0] Err_count[15 : 8] R
Upper 8 bits of segment error counter output
Address 128
7
[6:0]
W Always set to ‘0’.
R don’t care
GDC21D003
28