GDC21D003 Datasheet, PDF (26/77 Pages) Hynix Semiconductor – VSB Receiver

GDC21D003
Address 48, 49, 50, 51, 52:
[7:0]
[7:0]
MeanErrOUTP[15 : 8] R
MeanErrOUTP
[7:0]
R
Mean squared error at the output of Phase Tracker
[7:0]
UPlimitIN[7 : 0] W/R
2’s complementary number. If error of Equalizer is larger than this limit, it is
forced to be zero. Initial value is “00000000”.
[7:0] UDlimitIN[7 : 0]
W/R
2’s complementary number. If error of Equalizer is smaller than this limit, it is
forced to be zero. Initial value is “00000000”.
[7:0]
DcinformRD
[7:0]
R Information of DC value. This shows the currently DC value in DC reduction.
Address 53:
Shows the type of loop gain used in Phase Tracker. These bits are the results of
gain loop setting in LOOPgainIN
[6:4] GAINcnt [2:0] R “001” : phase tracker is OFF.
“010” : smaller gain is used.
“011” : normal gain is used.
[3:0]
W Always set to “1101”.
Address 64:
Parallel/serial output selection
7
Pase
W
‘1’ : parallel ‘0’ : serial
If this bit is set to ‘0’, VSBDATA[0] pin is used as serial data output and
VSBDATA[7] is used as start bit indicator of a byte. Initial value is ‘1’.
Viterbi Decoder on/off selection
6
Viterbi_on
W
‘1’ : on
‘0’ : off
If this bit is set to ‘0’, hard decision decoding is performed instead of viterbi
decoding. Initial value is ‘1’.
Deinterleaver on/off selection
5
Deint_on
W ‘1’ : on
‘0’ : off
If this bit is set to ‘0’, deinterleaver is bypassed. Initial value is ‘1’.
RS Decoder on/off selection
4
RSdec_on
W ‘1’ : on
‘0’ : off
If this bit is set to ‘0’, RS decoder is bypassed. Initial value is ‘1’.
Derandomizer on/off selection
3
Derand_on
W ‘1’ : on
‘0’ : off
If this bit is set to ‘0’, derandomizer is bypassed. Initial value is ‘1’.
Error flag bit insertion on/off selection. Valid only when Derand_on is set to ‘1’.
‘1’ : MSB of first data byte is set to ‘1’ when the packet has an uncorrected
2
Errorflag_ins
W
errors(when NVSBERRFLG is ‘0’)
‘0’ : nothing is done at the MSB of first data byte although the packet has an
uncorrected errors(when NVSBERRFLG is ‘0’)
Initial value is ‘1’.
VSBDVALID polarity indicator
‘1’ : VSBDATA[7:0] is valid at VSBDVALID = ‘1’ interval and invalid at
1
Vsbdvalid_pol W VSBDVALID = ‘0’ interval.
‘0’ : polarity is inverted
Initial value is ‘1’.
VSBCLK suppression indicator
0
Vsbclk_sup
W
‘1’ : VSBCLK is not suppressed at VSBDVALID = “invalid” interval
‘0’ : VSBCLK is suppressed(set to 0) at VSBDVALID = ”invalid” interval
Initial value is ‘1’.
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