GDC21D003 Datasheet, PDF (52/77 Pages) Hynix Semiconductor – VSB Receiver

6.4.4 Adaptive Filter
The 256-tap adaptive filter consists of two sub-
filters. One is feed-forward filter, and the other is
feedback filter. The feed-forward filter is 64-taps
long and the feedback filter is 192-taps long. The
data of feed-forward filter is I channel input
symbol. The data of feedback filter is training
sequence or sliced filter output. The coefficients
of this filter are updated internally by means of
the product of the estimated error by data delayed
in all taps. And the coefficients can be updated at
GDC21D003
every clock. The multiplexing scheme can be
introduced for 4 taps to share one multiplier. The
number of multipliers is reduced to a quarter. The
products of data and coefficients are added and
accumulated to make output. The output of feed-
forward filter and the output of feedback filter are
summed to make the filter output. These outputs
are transferred to the phase tracker. And they are
used to calculate the estimated error with training
sequence and sliced filter output. Figure 6.4.5
shows the block diagram of the filter.
data
Data Bank
64-tap feedforward filter
estimated error
decision data
memory
Coefficient Bank /
Coefficient Updater
Multiplier / Accumulator
Data Bank
192-tap feedback filter
FLTout
estimated error
memory
Coefficient Bank /
Coefficient Updater
Multiplier / Accumulator
Figure 6.4.5 Coefficient Update Filter
6.4.5 Equalizer Clock Scheme
The 256-tap filters are used in the equalizer.
Generally every tap has its own multiplier and the
portion of the multipliers is vast. The multiplexing
scheme can be introduced for several taps to share
one multiplier in this case. The 4-times
multiplexing scheme is used in our design.
Therefore one multiplier is shared to 4 taps. A
clock, 4-times multiplied by SYMCLK(symbol
clock) is needed for multiplexing. The PLL is used
for generating the 4-times multiplying
clock(CLK4EQ).
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