GDC21D003 Datasheet, PDF (36/77 Pages) Hynix Semiconductor – VSB Receiver

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LA7785M ^IOUT-
(SANYO)
30
IOUT+
GDC21D003
126
INN
125
INP
GDC21D003
41
SYMCLK
18
CLKFS
OPEN
VCXO
(NOTE)
- Regarding external VCXO output frequency, VCXOSEL[1:0] should be set as Table 6.2.1.
- Since internal ADC is used, peripheral circuit should be set according to ADC.
- Digital input signal path should be set as Table 6.3.1 to use internal ADC.
- If VCXO output frequency is equal to symbol frequency, VCXO(pin12) can be connected to GND,
and SYMCLK(pin41) and VCXO output can be connected directly.
Figure 6.3.2 I/F Circuit Diagram between VSB Receiver & Demodulator (Internal A/D Input)
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