GDC21D003 Datasheet, PDF (70/77 Pages) Hynix Semiconductor – VSB Receiver

VSBCLK
VSBDATA[7:0]
GDC21D003
Figure 6.6.13 I/F to Transport Demultiplexer(MMDS 8VSB Mode)
If only I²C register64[7](pase) is set to ‘0’ and other values are reserved as the default, serial interface is offered.
1) the VSBDATA[7] signal indicates the start bit of a byte,
2) the VSBDATA[0] signal is the serial data output,
3) the VSBDATA[6:1] signals are set to “000000”. See Fig. 6.6.14.
VSBCLK
VSBSOP
VSBDVALID
NVSBERRFLG
VSBDATA[7]
VSBDATA[0]
H or L
0 1 0 0 0 1 1 1 b7 b6 b5 b4 b3 b2 b1 b0 b7 b6 b5 b4 ^......
Figure 6.6.14 I/F to Transport Demultiplexer at Serial Output Mode
Connection examples with VSB receivers and transport demultiplexer chips are shown in Fig. 6.6.15 - 6.6.17.
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