GDC21D003 Datasheet, PDF (25/77 Pages) Hynix Semiconductor – VSB Receiver

Address 38:
[7:4] WrCoef[11: 8]
[3:0] RdCoef[11: 8]
GDC21D003
W/R Coefficients to write to the Equalizer. Default value is “0000”.
R Coefficients to be read from the Equalizer filter.
Address 39:
[7:0] WrCoef[7: 0]
W/R Coefficients to write to the Equalizer filter. Initial value is “00000000”.
Address 40:
[7:0] RdCoef[7: 0]
R Coefficients to be read from the Equalizer filter.
Address 41:
[7:6] ^{UpdtRngIN[9: 8]}
W/R
Data range to be updated when nAdtOnDataI2 is ‘0’. Initial value is “00”. This
is 10-bit number.
[5:3]
MeanErrINE
[18: 16]
R Mean squared error at the input of equalizer. This is 19-bit number.
[2:1]
MeanErrOUTE[
18: 16]
R
Mean squared error at the output of equalizer. This is 19-bit number.
Address 42, 43, 44, 45, 46:
[7:0] ^{UpdtRngIN[7:0]}
W/R
Data range to be updated when nAdtOnDataI2 is set Initial value is
“10010000”.
[7:0]
[7:0]
MeanErrINE
[15 : 8]
MeanErrINE
[7 : 0]
R
Mean squared error at the input of Equalizer
R
[7:0]
MeanErrOUTE[
15: 8]
R
[7:0]
MeanErrOUTE[
7: 0 ]
R
Mean squared error at the output of Equalizer
Address 47:
[7:5]
MeanErrOUTP
[18 : 16]
R
Mean squared error at the output of Phase Tracker. This is 19-bit number.
[4:3]
UPlimitIN
[9 : 8]
W/R
10-bit 2’s complementary number and this should be positive number. If error of
equalizer is larger than this limit, forces error to zero. Default value is “01”.
10-bit 2’s complementary number and this should be negative number. If error
[2:1] UDlimitIN[9 : 8] W/R of equalizer is smaller than this limit, it is forced to be zero. Default value is
“11”.
0
DcinformRD[8] R Information of DC value. This shows the current DC value in DC reduction.
0
DcinformRD[8] R Information of DC value. This shows the current DC value in DC reduction.
26