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| GDC21D003 Datasheet, PDF (67/77 Pages) Hynix Semiconductor – VSB Receiver | |||
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GDC21D003
VSBCLK
VSBSOP
VSBDVALID
NVSBERRFLG
VSBDATA[7:0]
with error
47H byte0 byte1
188
without error
byte186 0
0
20
47H byte0
1
MSB of byte0 in the packet with error is set to â1â
Figure 6.6.8 I/F to Transport Demultiplexer when Register64[7:0] is set to Default Value
If only I2C register64[3](Derand_on) is set to â0â and other values are reserved as the default,
1) the derandomizer is bypassed,
2) the data segment sync is set to 00H instead of 47H,
3) nothing is done at the MSB of the first data byte although the data segment has uncorrected errors.
See Fig. 6.6.9.
68
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