GDC21D003 Datasheet, PDF (28/77 Pages) Hynix Semiconductor – VSB Receiver

6. Functional Description
6.1 ADC
The ADC is a 10-bit 10.76Msps analog-to-digital
converter. The ADC takes samples of the
differential analog input signals at rising clock
edge and converts them into digital values. The
ADC consists of four main function blocks; SHA
block, A/D & D/A block, Correction Logic block,
and Output Buffer block. The detailed description
is as follows.
GDC21D003
The SHA(sample & hold amplifier) block samples
the differential analog inputs at rising clock edge.
And the following A/D & D/A(sub-A/D converter
& multiplying D/A converter) block compares the
input signal with the reference voltage and
multiplies the residue signal as the determined
gain. These processes are repeated in the
following stage. The digital outputs are generated
at each stage, corrected in the Correction Logic
block, and come out through the Output Buffer
block. Figure 6.1.1 shows the block diagram of
ADC.
INP
INN
REFP
REFN
COM
BIAS
REF
SYMCLK
SHA
SHA
Gain
SHA
Gain
SHA
Gain
SHA
Gain
A/D
A/D D/A
A/D D/A
A/D D/A
A/D D/A
Correction Logic
Output Buffer
10 data output
(to synchronizer block)
Figure 6.1.1 Block Diagram of ADC
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