GDC21D003 Datasheet, PDF (12/77 Pages) Hynix Semiconductor – VSB Receiver

GDC21D003
Sync Recovery ; 20 Pins
PIN
NAME
TYPE
DESCRIPTION
20, 22-24, 26-28,
DIN[9:0]
I Digital data input; This data input comes from
30-32
Bit9 : MSB
external ADC.
44
DATAPOLP
I/O^* Polarity signal of input data(active high); If this
output value is ‘1’, it means the plus polarity.
This signal should be applied to demodulator IC.
43
DATAPOLN
I/O^* Inverted polarity signal of input data(active high);
This signal should be applied to demodulator IC.
46
SEGSYNCLOCK
I/O^* Stability Indication of Data Segment Sync
recovery(active high)
52
GUP
I/O^* Input data gain increasing signal(active high); This
signal should be applied to demodulator IC.
53
GDN
I/O^* Input data gain decreasing signal(active high); This
signal should be applied to demodulator IC.
55
NFSYNC
O Field Sync(active low); If this output value is ‘0’, it
means Field Sync interval.
56
NCHGUP
O Charging signal for charge pump in the timing
recovery block(active low)
57
NCHGDN
O Discharging signal for charge pump in the timing
recovery block(active low)
66
FOE
O Field status indicator(active high); If this output value
is ‘1’, it means inverted field.
90
NSEGSYNC
O Data Segment Sync(active low); If this output value is
‘0’, it means Data Segment Sync interval.
(NOTE) * These five I/O pins are used as input pin only for chip test.
Equalizer ; 6 Pins
PIN
NAME
TYPE
DESCRIPTION
35
PLLEN
I PLL enable(active high); This pin should be set to ‘1’.
108
NCOUPDTWIN
O Coefficient update window(active low); If this output
value is ‘0’, the Equalizer adapts its coefficients.
Otherwise, it doesn't adapt its coefficients.
110
EQSTAT
O Equalizer status; If this output value is ‘1’, the
Equalizer is in normal status.
Otherwise, the Equalizer has diverged.
114
NADTONDATA
I Data mode coefficient update(active low);
If this input is set to ‘0’, the Equalizer adapts its
coefficients during training sequence and data interval.
Otherwise, the Equalizer adapts its coefficients during
only training sequence interval.
116
NINITEQ
I Equalizer initialization(active low); If this input is set
to ‘0’, the Equalizer is initialized.
117
NFREEZEEQ
I Equalizer freeze(active low); If this input is set to ‘0’,
the Equalizer coefficient does not be adapted.
(NOTE) When I²C is enabled, operation is performed either using these pins or via I²C register, but
when disabled, only these pins are used. If you want to control Equalizer fast, use these external
input pins. Otherwise use I²C bus registers.
13