GDC21D003 Datasheet, PDF (49/77 Pages) Hynix Semiconductor – VSB Receiver

6.4 Equalizer
The equalizer compensates for linear channel
distortions, such as tilt and ghosts. These
distortions can come from the transmission channel
or the imperfect components within the receiver.
The Equalizer uses a Least-Mean-Square algorithm
and decision feedback equalizer structure. The
adaptive equalization is performed with training
sequence, and blind equalization is also supported.
6.4.1 Block Diagram
The Equalizer has a decision feedback structure
with 64-tap feed-forward filter and 192-tap
feedback filter. Its internal diagram is Figure 6.4.1
and it consists of 256-tap adaptive filter, training
sequence generator, slicer, delays for data storage,
GDC21D003
subtractor, and control block. Each tap of 256-filter
tap has its own update part which is composed of
tap coefficient storage, adder, and multiplier. This
makes the equalizer converge into the channel
condition very fast. This filter is able to initialize
its coefficients through register33[2] (InitEQI2) bit
and update the coefficients internally during one
system clock(10.76 MHz) cycle as well as
download the coefficients through I²C register by
user. The outputs of feed-forward filter and
feedback filter are summed to produce the output.
This filter is applicable to 8 VSB terrestrial
broadcasting mode and 2, 4, 8, and 16 VSB cable
mode. Figure 6.4.2 shows the slicer of equalizer.
This decision feedback structure with a coefficient
update filter and LMS algorithm can optimize the
VSB equalizer in converging time, remaining error
and stability.
I Channel
Input
Symbols
10.76
MS/sec.
64 Tap
Σ Forward +
Filter
Filter
-
Taps
Σ
Tap
Storage
192 Tap
Feedback
µ
Delay 1
Tap
Storage
Filter
Filter
Taps
Σ
D
µ
Decision
Data
Forward
Tap Index
Estimated
Error
Control
nFreezeEQ
Equalized
I Channel
Output
Training
Sequence
M
U
X
Slicer
10.76
MS/sec.
Feedback
Tap Index
D
Delay 2
-
Σ₊
Figure 6.4.1 Channel Equalizer
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