GDC21D003 Datasheet, PDF (35/77 Pages) Hynix Semiconductor – VSB Receiver

6.3 Synchronizer
6.3.1 Input Control
VSB receiver(GDC21D003) use 10bits signal
generated in internal A/D converter or
GDC21D003
10bits(DIN[9:0]) external data input to perform
digital processing. Therefore, the data input path
must be set according to input before digital
processing.
INN
Internal
10
INP
A/D Converter
DIN[9:0] 10
10
A/D Converter
MSB Control
Multiplexer
10 Digital Input Signal
Dinmode
Input Selection
Dinsel
Figure 6.3.1 The Block Diagram of Input Selection
Figure 6.3.1 is internal block diagram of Input
Selection. You have to choose either the output of
internal A/D converter or that of external A/D
converter as digital input signal (Dinsel). If you
decide to use the output of external one,
MSB(DIN[9]) of 10bits input (DIN[9:0]) should be
set according to its output characteristics(Dinmode).
Setting of Dinsel and Dinmode is performed
through I²C bus and it is as following Table 6.3.1.
Table 6.3.1 Input Signal Path Setting
Input signal path
From internal A/D converter
From DIN[9:0] (Signed signal)
From DIN[9:0] (Unsigned signal)
Dinmode
(in I²C bus register0)
Don’t care
‘0’
‘1’
Dinsel
(in I²C bus register0)
‘1’
‘0’
‘0’
Figure 6.3.2 shows the relationship between chip
and external device in case that internal ADC
output is used for digital processing. Figure 6.3.3
shows the relationship between chip and external
device in case that ADC digital output is used for
on-chip digital processing with using other external
ADC instead of using internal ADC.
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