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MC68HC908JB8 Datasheet, PDF (96/286 Pages) Motorola, Inc – MICROCONTROLLERS
System Integration Module (SIM)
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
$FE00 Break Status Register Read:
SBSW
(BSR) Write: R
R
R
R
R
R
R
See note
Reset:
0
Note: Writing a logic 0 clears SBSW.
$FE01 Reset Status Register Read: POR
PIN
COP
ILOP
ILAD
USB
LVI
0
(RSR) Write:
POR: 1
0
0
0
0
0
0
0
$FE02
Reserved Read:
R
R
R
R
R
R
R
R
Write:
$FE03
Break Flag Control Read:
Register
(BFCR)
Write:
BCFE
R
R
R
R
R
R
R
Reset: 0
$FE04 Interrupt Status Register 1 Read: IF6
IF5
IF4
IF3
IF2
IF1
0
0
(INT1) Write: R
R
R
R
R
R
R
R
Reset: 0
0
0
0
0
0
0
0
Figure 8-2. SIM I/O Register Summary
8.3 SIM Bus Clock Control and Generation
The bus clock generator provides system clock signals for the CPU and
peripherals on the MCU. The system clocks are generated from an
incoming clock, OSCOUT, as shown in Figure 8-3.
Technical Data
96
FROM CLOCK
DOUBLER
FROM CLOCK
DOUBLER
OSCXCLK
OSCOUT
SIM COUNTER
÷2
BUS CLOCK
GENERATORS
SIM
Figure 8-3. SIM Clock Signals
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
System Integration Module (SIM)
Freescale Semiconductor