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MC68HC908JB8 Datasheet, PDF (281/286 Pages) Motorola, Inc – MICROCONTROLLERS
MC68HC08JT8
B.5 Power Supply Pins
The MC68HC08JT8 is design for low voltage operation. Connect VDD
and VREG for normal operation.
The VREG voltage regulator is disabled on the MC68HC08JT8.
MCU
VDD
VREG
VSS
CBYPASS 0.1 µF
+
CBULK 10 µF
VDD
NOTE: Values shown are typical values.
Figure B-3. Power Supply Bypassing
B.6 Reserved Register Bit
Bit 4 of the configuration register ($001F) is a reserved bit on the
MC68HC08JT8. The bit will always read as zero.
On the MC68HC908JB8, bit 4 of the configuration register is the low-
voltage inhibit disable bit, LVID.
B.7 Reserved Registers
The two registers at $FE08 and $FE09 are reserved locations on the
MC68HC08JT8.
On the MC68HC908JB8, these two locations are the FLASH control
register and the FLASH block protect register respectively.
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
Freescale Semiconductor
MC68HC08JT8
Technical Data
281