MC68HC908JB8 Datasheet, PDF (213/286 Pages) Motorola, Inc – MICROCONTROLLERS

Input/Output Ports (I/O)
Port E
12.7.1 Port E Data Register
The port E data register contains a data latch for each of the five port E
pins.
NOTE: PTE2 and PTE0 are not available in the 20-pin PDIP and 20-pin SOIC
packages.
Address: $0008
Bit 7
6
Read: 0
0
Write:
Reset:
Alternative
Function:
Additional
Function:
Additional
Function:
5
4
3
2
1
Bit 0
0
PTE4 PTE3 PTE2 PTE1 PTE0
Unaffected by reset
D–
D+
TCH1 TCH0 TCLK
Optional Optional Optional Optional Optional
pullup pullup pullup pullup pullup
External
interrupt
Open-drain Open-drain
= Unimplemented
Figure 12-14. Port E Data Register (PTE)
PTE[4:0] — Port E Data Bits
PTE[4:0] are read/write, software-programmable bits. Data direction
of each port E pin is under the control of the corresponding bit in data
direction register E.
The PTE4 and PTE3 pullup enable bits, PTE4P and PTE3P, in the
port option control register (POCR) enable 5kΩ pullups on PTE4 and
PTE3 if the respective pin is configured as an input and the USB
module is disabled. (See 12.8 Port Options.)
The PTE[2:0] pullup enable bit, PTE20P, in the port option control
register (POCR) enables pullups on PTE2–PTE0, regardless of the
pin is configured as an input or an output. (See 12.8 Port Options.)
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
Freescale Semiconductor
Input/Output Ports (I/O)
Technical Data
213