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MC68HC908JB8 Datasheet, PDF (37/286 Pages) Motorola, Inc – MICROCONTROLLERS | |||
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General Description
Pin Assignments
When the USB module is disabled, the PTE4 and PTE3 pins are
general-purpose bidirectional I/O port pins with 10mA sink capability.
Each pin is open-drain when configured as an output; and each pin
contains a software configurable 5k⦠pullup to VDD when configured as
an input. The PTE4 pin can also be enabled to trigger the IRQ interrupt.
When the USB module is enabled, the PTE4/Dâ and PTE3/D+ pins
become the USB module Dâ and D+ pins. The Dâ pin contains a
software configurable 1.5k⦠pullup to VREG. (See Section 11. Timer
Interface Module (TIM), Section 9. Universal Serial Bus Module
(USB) and Section 12. Input/Output Ports (I/O).)
Summary of the pin functions are provided in Table 1-1.
Table 1-1. Summary of Pin Functions
PIN NAME
VDD
VSS
VREG
RST
IRQ
PIN DESCRIPTION
Power supply.
Power supply ground.
Regulated 3.3V output from MCU.
Reset input; active low.
With internal pullup to VDD and schmitt trigger input.
External IRQ pin; with programmable internal pullup to VDD
and schmitt trigger input.
Used for mode entry selection.
IN/OUT
IN
OUT
OUT
IN/OUT
IN
IN
OSC1
Crystal oscillator input.
IN
OSC2
Crystal oscillator output; inverting of OSC1 signal.
OUT
PTA0/KBA0
:
PTA7/KBA7
8-bit general-purpose I/O port.
Pins as keyboard interrupts, KBA0âKBA7.
Each pin has programmable internal pullup to VREG when
configured as input.
PTB0âPTB7
8-bit general-purpose I/O port.
Each pin has programmable internal pullup to VREG when
configured as input.
IN/OUT
IN
IN
IN/OUT
IN
VOLTAGE LEVEL
4.0 to 5.5V
0V
VREG (3.3V)
VDD
VDD
VREG to VDD+VHI
VREG
VREG
VREG
VREG
VREG
VREG
VREG
MC68HC908JB8â¢MC68HC08JB8â¢MC68HC08JT8 â Rev. 2.3
Freescale Semiconductor
General Description
Technical Data
37
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