MC68HC908JB8 Datasheet, PDF (250/286 Pages) Motorola, Inc – MICROCONTROLLERS

Break Module (BREAK)
BRKA — Break Active Bit
This read/write status and control bit is set when a break address
match occurs. Writing a logic 1 to BRKA generates a break interrupt.
Clear BRKA by writing a logic 0 to it before exiting the break routine.
Reset clears the BRKA bit.
1 = Break address match
0 = No break address match
17.6.2 Break Address Registers
The break address registers contain the high and low bytes of the
desired breakpoint address. Reset clears the break address registers.
Address: $FE0C
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit 15
14
13
12
11
10
Write:
9
Bit 8
Reset: 0
0
0
0
0
0
0
0
Figure 17-4. Break Address Register High (BRKH)
Address: $FE0D
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit 7
6
5
4
3
2
1
Bit 0
Write:
Reset: 0
0
0
0
0
0
0
0
Figure 17-5. Break Address Register Low (BRKL)
17.6.3 Break Status Register
The break status register (BSR) contains a flag to indicate that a break
caused an exit from stop or wait mode. This status bit is useful in
applications requiring a return to wait or stop mode after exiting from a
break interrupt.
Technical Data
250
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
Break Module (BREAK)
Freescale Semiconductor