MC68HC908JB8 Datasheet, PDF (33/286 Pages) Motorola, Inc – MICROCONTROLLERS

General Description
Pin Assignments
V_{SS 1}
OSC1 2
OSC2 3
V_REG
4
V_DD 5
PTD0 6
PTD1 7
PTD2 8
PTD3 9
PTD4 10
PTE1/TCH0 11
PTE3/D+ 12
PTE4/D– 13
PTC0 14
28 ^RST
27 ^PTA0/KBA0
26 ^PTA1/KBA1
25 ^PTA2/KBA2
24 ^PTA3/KBA3
23 ^PTE0/TCLK
22 ^PTE2/TCH1
21 ^PTA4/KBA4
20 ^PTA5/KBA5
19 ^PTA6/KBA6
18 ^PTA7/KBA7
17 ^PTD5
16 ^PTD6
15 IRQ
Pins not available on 28-pin package:
PTB0
PTB1
PTC1
PTB2
PTC2
PTB3
PTC3
PTB4
PTC4
PTB5
PTC5
PTB6
PTC6
PTB7
PTC7
PTD7
Internal pads are unconnected.
Figure 1-3. 28-Pin SOIC Pin Assignments
V_SS 1
OSC1 2
OSC2 3
V_REG
4
V_DD 5
PTD0/1 6
PTE1/TCH0 7
PTE3/D+ 8
PTE4/D– 9
PTC0 10
20 ^RST
19 ^PTA0/KBA0
18 ^PTA1/KBA1
17 ^PTA2/KBA2
16 ^PTA3/KBA3
15 ^PTA4/KBA4
14 ^PTA5/KBA5
13 ^PTA6/KBA6
12 ^PTA7/KBA7
11 ^IRQ
PTD0/1 pin: PTD0 and PTD1 internal pads are
bonded together to PTD0/1 pin.
Pins not available on 20-pin package:
PTB0
PTE0/TCLK
PTB1 PTC1
PTB2 PTC2 PTD2 PTE2/TCH1
PTB3 PTC3 PTD3
PTB4 PTC4 PTD4
PTB5 PTC5 PTD5
PTB6 PTC6 PTD6
PTB7 PTC7 PTD7
Internal pads are unconnected.
Figure 1-4. 20-Pin PDIP and SOIC Pin Assignments
NOTE: In 20-pin package, the PTD0 and PTD1 internal pads are bonded
together to PTD0/1 pin.
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
Freescale Semiconductor
General Description
Technical Data
33