MC68HC908JB8 Datasheet, PDF (100/286 Pages) Motorola, Inc – MICROCONTROLLERS

System Integration Module (SIM)
8.4.2.1 Power-On Reset
When power is first applied to the MCU, the power-on reset module
(POR) generates a pulse to indicate that power-on has occurred. The
external reset pin (RST) is held low while the SIM counter counts out
4096 OSCXCLK cycles. Sixty-four OSCXCLK cycles later, the CPU and
memories are released from reset to allow the reset vector sequence to
occur.
At power-on, the following events occur:
• A POR pulse is generated.
• The internal reset signal is asserted.
• The SIM enables the oscillator to drive OSCXCLK.
• Internal clocks to the CPU and modules are held inactive for 4096
OSCXCLK cycles to allow stabilization of the oscillator.
• The RST pin is driven low during the oscillator stabilization time.
• The POR bit of the reset status register (RSR) is set and all other
bits in the register are cleared.
OSC1
PORRST
OSCXCLK
OSCOUT
RST
IAB
4096
CYCLES
32
CYCLES
32
CYCLES
$FFFE
$FFFF
Figure 8-7. POR Recovery
Technical Data
100
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
System Integration Module (SIM)
Freescale Semiconductor