MC68HC908JB8 Datasheet, PDF (197/286 Pages) Motorola, Inc – MICROCONTROLLERS

Timer Interface Module (TIM)
I/O Registers
NOTE: Before enabling a TIM channel register for input capture operation, make
sure that the PTEx/TCHx pin is stable for at least two bus clocks.
TOVx — Toggle-On-Overflow Bit
When channel x is an output compare channel, this read/write bit
controls the behavior of the channel x output when the TIM counter
overflows. When channel x is an input capture channel, TOVx has no
effect. Reset clears the TOVx bit.
1 = Channel x pin toggles on TIM counter overflow
0 = Channel x pin does not toggle on TIM counter overflow
NOTE: When TOVx is set, a TIM counter overflow takes precedence over a
channel x output compare if both occur at the same time.
CHxMAX — Channel x Maximum Duty Cycle Bit
When the TOVx bit is at logic 1, setting the CHxMAX bit forces the
duty cycle of buffered and unbuffered PWM signals to 100%. As
Figure 11-8 shows, the CHxMAX bit takes effect in the cycle after it
is set or cleared. The output stays at the 100% duty cycle level until
the cycle after CHxMAX is cleared.
OVERFLOW
OVERFLOW
PERIOD
PTEx/TCHx
OVERFLOW
OVERFLOW
OVERFLOW
CHxMAX
OUTPUT
COMPARE
OUTPUT
COMPARE
OUTPUT
COMPARE
OUTPUT
COMPARE
Figure 11-8. CHxMAX Latency
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
Freescale Semiconductor
Timer Interface Module (TIM)
Technical Data
197