MC68HC908JB8 Datasheet, PDF (275/286 Pages) Motorola, Inc – MICROCONTROLLERS

MC68HC08JB8
NOTES:
1. V_DD = 4.0 to 5.5 Vdc, V_SS = 0 Vdc, T_A = T_L to T_H, unless otherwise noted.
2. Typical values reflect average measurements at midpoint of voltage range, 25 °C only.
3. Run (operating) I_DD measured using external square wave clock source (f_XCLK = 6 MHz). All inputs 0.2 V from rail. No dc
loads. Less than 100 pF on all outputs. C_L = 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly
affects run I_DD. Measured with all modules enabled.
4. Wait I_DD measured using external square wave clock source (f_XCLK = 6 MHz); all inputs 0.2 V from rail; no dc loads; less
than 100 pF on all outputs. C_L = 20 pF on OSC2; 15 kΩ ± 5% termination resistors on D+ and D– pins; all ports configured
as inputs; OSC2 capacitance linearly affects wait I_DD
5. STOP I_DD measured with USB in suspend mode; OSC1 grounded; transceiver pullup resistor of 1.5 kΩ ± 5% between V_REG
and D– pins and 15 kΩ ± 5% termination resistor on D+ pin; no port pins sourcing current.
6. Maximum is highest voltage that POR is guaranteed.
7. If minimum V_REG is not reached before the internal POR reset is released, RST must be driven low externally until minimum
V_REG is reached.
A.7.2 Memory Characteristics
Characteristic
Symbol
Min
RAM data retention voltage
V_RDR
1.3
Notes:
Since MC68HC08JB8 is a ROM device, FLASH memory electrical characteristics do not apply.
Max
—
Unit
V
A.8 MC68HC08JB8 Order Numbers
These part numbers are generic numbers only. To place an order, ROM
code must be submitted to the ROM Processing Center (RPC).
Table A-2. MC68HC08JB8 Order Numbers
MC Order Number
MC68HC08JB8JP
MC68HC08JB8JDW
MC68HC08JB8ADW
MC68HC08JB8FB
Package
20-pin PDIP
20-pin SOIC
28-pin SOIC
44-pin QFP
Operating
Temperature Range
0 to +70 °C
0 to +70 °C
0 to +70 °C
0 to +70 °C
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
Freescale Semiconductor
MC68HC08JB8
Technical Data
275