MC68HC908JB8 Datasheet, PDF (108/286 Pages) Motorola, Inc – MICROCONTROLLERS

System Integration Module (SIM)
8.6.1.2 SWI Instruction
The SWI instruction is a non-maskable instruction that causes an
interrupt regardless of the state of the interrupt mask (I bit) in the
condition code register.
NOTE: A software interrupt pushes PC onto the stack. A software interrupt does
not push PC–1, as a hardware interrupt does.
8.6.2 Interrupt Status Registers
The flags in the interrupt status registers identify maskable interrupt
sources. Table 8-4 summarizes the interrupt sources and the interrupt
status register flags that they set. The interrupt status registers can be
useful for debugging.
Source
SWI Instruction
USB Reset Interrupt
USB Endpoint 0 Transmit
USB Endpoint 0 Receive
USB Endpoint 1 Transmit
USB Endpoint 2 Transmit
USB Endpoint 2 Receive
USB End of Packet
USB Resume Interrupt
IRQ Interrupt (IRQ, PTE4)
TIM Channel 0
TIM Channel 1
TIM Overflow
Keyboard Interrupt
Table 8-4. Interrupt Sources
Flags
RSTF
TXD0F
RXD0F
TXD1F
TXD2F
RXD2F
EOPF
RESUMF
IRQF
PTE4IF
CH0F
CH1F
TOF
KEYF
Mask⁽¹⁾
URSTD
TXD0IE
RXD0IE
TXD1IE
TXD2IE
RXD2IE
EOPIE
—
IMASK
CH0IE
CH1IE
TOIE
IMASKK
INT Register Flag
—
IF2
IF1
IF3
IF4
IF5
IF6
Priority⁽²⁾
0
1
2
3
4
5
6
Vector Address
$FFFC–$FFFD
$FFFA–$FFFB
$FFF8–$FFF9
$FFF6–$FFF7
$FFF4–$FFF5
$FFF2–$FFF3
$FFF0–$FFF1
1. The I bit in the condition code register is a global mask for all interrupt sources except the SWI instruction.
2. 0 = highest priority
Technical Data
108
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
System Integration Module (SIM)
Freescale Semiconductor