MC68HC908JB8 Datasheet, PDF (60/286 Pages) Motorola, Inc – MICROCONTROLLERS

FLASH Memory
4.8 FLASH Protection
Due to the ability of the on-board charge pump to erase and program the
FLASH memory in the target application, provision is made to protect
blocks of memory from unintentional erase or program operations due to
system malfunction. This protection is done by use of a FLASH block
protect register (FLBPR). The FLBPR determines the range of the
FLASH memory which is to be protected. The range of the protected
area starts from a location defined by FLBPR and ends to the bottom of
the FLASH memory ($FFFF). When the memory is protected, the HVEN
bit cannot be set in either ERASE or PROGRAM operations.
NOTE:
When the FLBPR is cleared (all 0’s), the entire FLASH memory is
protected from being programmed and erased. When all the bits are set,
the entire FLASH memory is accessible for program and erase.
4.8.1 FLASH Block Protect Register
The FLASH block protect register is implemented as an 8-bit I/O register.
The content of this register determine the starting location of the
protected range within the FLASH memory.
Address: $FE09
Bit 7
6
5
4
3
2
1
Read:
BPR7
Write:
BPR6
BPR5
BPR4
BPR3
BPR2
BPR1
Reset: 0
0
0
0
0
0
0
Figure 4-4. FLASH Block Protect Register (FLBPR)
Bit 0
BPR0
0
Technical Data
60
BPR[7:0] — FLASH Block Protect Register Bit 7 to Bit 0
BPR[7:1] represent bits [15:9] of a 16-bit memory address; bits [8:0]
are logic 0’s.
16-bit memory address
Start address of FLASH block protect
000000000
BPR[7:1]
Figure 4-5. FLASH Block Protect Start Address
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
FLASH Memory
Freescale Semiconductor