MC68HC05B6_13 Datasheet, PDF (90/302 Pages) Freescale Semiconductor, Inc – Microcontrollers

6.11.5 Baud rate register (BAUD)
The baud rate register provides the means to select two different or equivalent baud rates for the
transmitter and receiver.
SCI baud rate (BAUD)
Address
$000D
bit 7
SCP1
bit 6
SCP0
bit 5
SCT2
bit 4
SCT1
bit 3
SCT0
bit 2
SCR2
bit 1
SCR1
bit 0
SCR0
State
on reset
00uu uuuu
SCP1, SCP0 — Serial prescaler select bits
These read/write bits determine the prescale factor, NP, by which the internal processor clock is
divided before it is applied to the transmitter and receiver rate control dividers, NT and NR. This
common prescaled output is used as the input to a divider that is controlled by the SCR0–SCR2
bits for the SCI receiver, and by the SCT0–SCT2 bits for the transmitter.
6
Table 6-3 First prescaler stage
SCP1
0
0
1
1
SCP0
0
1
0
1
Prescaler
division ratio (NP)
1
3
4
13
SCT2, SCT1,SCT0 — SCI rate select bits (transmitter)
These three read/write bits select the baud rates for the transmitter. The prescaler output is divided
by the factors shown in Table 6-4.
Table 6-4 Second prescaler stage (transmitter)
SCT2
0
0
0
0
1
1
1
1
SCT1
0
0
1
1
0
0
1
1
SCT0
0
1
0
1
0
1
0
1
Transmitter
division ratio (NT)
1
2
4
8
16
32
64
128
Freescale
6-18
SERIAL COMMUNICATIONS INTERFACE
MC68HC05B6
Rev. 4.1