MC68HC05B6_13 Datasheet, PDF (132/302 Pages) Freescale Semiconductor, Inc – Microcontrollers

11
11.2
DC electrical characteristics
Table 11-2 DC electrical characteristics for 5V operation
(V_DD = 5 Vdc ± 10%, V_SS = 0 Vdc, T_A = T_L to T_H)
Characteristic⁽¹⁾
Output voltage
I_LOAD = – 10 µA
I_LOAD = +10 µA
Output high voltage (I_LOAD = 0.8mA)
PA0–7, PB0–7, PC0–7, TCMP1, TCMP2
Output high voltage (I_LOAD = 1.6mA)
TDO, SCLK, PLMA, PLMB
Output low voltage (I_LOAD = 1.6mA)
PA0–7, PB0–7, PC0–7, TCMP1, TCMP2,
TDO, SCLK, PLMA, PLMB
Output low voltage (I_LOAD = 1.6mA)
RESET
Input high voltage
PA0–7, PB0–7, PC0–7, PD0–7, OSC1,
IRQ, RESET, TCAP1, TCAP2, RDI
Input low voltage
PA0–7, PB0–7, PC0–7, PD0–7, OSC1, IRQ,
RESET,TCAP1, TCAP2, RDI
Supply current⁽³⁾
RUN (SM = 0) (See Figure 11-1)
RUN (SM = 1) (See Figure 11-2)
WAIT (SM = 0) (See Figure 11-3)
WAIT (SM = 1) (See Figure 11-4)
STOP
0 to 70 (standard)
– 40 to 85 (extended)
– 40 to 105 (extended)
– 40 to 125 (automotive)
High-Z leakage current
PA0–7, PB0–7, PC0–7, TDO, RESET, SCLK
Input current (0 to 70)
IRQ, OSC1, TCAP1, TCAP2, RDI,
PD0/AN0-PD7/AN7 (channel not selected)
Input current (– 40 to 125)
IRQ, OSC1, TCAP1, TCAP2, RDI,
Capacitance
Ports (as input or output), RESET, TDO, SCLK
IRQ, TCAP1, TCAP2, OSC1, RDI
PD0/AN0–PD7/AN7 (A/D off)
PD0/AN0–PD7/AN7 (A/D on)
Symbol
Min
Typ⁽²⁾
Max
Unit
V_OH
V_DD – 0.1
—
—
V
V_OL
—
—
0.1
V_OH
V_DD – 0.8 V_DD – 0.4
—
V
V_OH
V_DD – 0.8 V_DD – 0.4
—
V_OL
—
0.1
0.4
V
V_OL
0.4
1
V_IH
0.7V_DD
—
V_DD
V
V_IL
V_SS
—
0.2V_DD
V
—
3.5
6
mA
—
0.5
1.5
mA
—
1
2
mA
I_DD
—
0.35
1
mA
—
2
10
µA
—
—
20
µA
—
—
60
µA
—
—
60
µA
I_IL
—
±0.2
±1
µA
I_IN
—
±0.2
±1
mA
±0.2
±1
I_IN
—
C_OUT
—
C_IN
—
CC_IINN
—
—
—
±5
µA
—
12
pF
—
8
pF
12
—
pF
22
—
pF
(1) All I_DD measurements taken with suitable decoupling capacitors across the power supply to suppress the transient
switching currents inherent in CMOS designs (see Section 2).
(2) Typical values are at mid point of voltage range and at 25°C only.
(3) RUN and WAIT I_DD: measured using an external square-wave clock source (f_OSC = 4.2MHz); all inputs 0.2 V from
rail; no DC loads; maximum load on outputs 50pF (20pF on OSC2).
STOP
OSC1
/WAIT
= V_DD.
I_DD:
all
ports
configured
as
inputs;
V_IL
=
0.2
V
and
V_IH
=
V_DD
–
0.2
V:
STOP
I_DD
measured
with
WAIT I_DD is affected linearly by the OSC2 capacitance.
Freescale
11-2
ELECTRICAL SPECIFICATIONS
MC68HC05B6
Rev. 4.1