MC68HC05B6_13 Datasheet, PDF (47/302 Pages) Freescale Semiconductor, Inc – Microcontrollers

3.5.2 EEPROM read operation
To be able to read from EEPROM, the E1LAT bit has to be at logic zero, as shown in Table 3-1.
While this bit is at logic zero, the E1PGM bit and the E1ERA bit are permanently reset to zero and
the 256 bytes of EEPROM may be read as if it were a normal ROM area. The internal charge pump
generator is automatically switched off since the E1PGM bit is reset.
3
If a read operation is executed while the E1LAT bit is set (erase or programming sequence), data
resulting from the operation will be $FF.
Note:
When not performing any programming or erase operation, it is recommended that
EEPROM should remain in the read mode (E1LAT = 0)
3.5.3 EEPROM erase operation
To erase the contents of a byte of the EEPROM, the following steps should be taken:
1 Set the E1LAT bit.
1) Set the E1ERA bit (1& 2 may be done simultaneously with the same
instruction).
2) Write address/data to the EEPROM address to be erased.
3) Set the E1PGM bit.
4) Wait for a time t_ERA1.
5) Reset the E1LAT bit (to logic zero).
While an erase operation is being performed, any access of the EEPROM array will not be
successful.
The erased state of the EEPROM is $FF and the programmed state is $00.
Note:
Data written to the address to be erased is not used, therefore its value is not
significant.
If a second word is to be erased, it is important that the E1LAT bit be reset before restarting the
erasing sequence otherwise any write to a new address will have no effect. This condition provides
a higher degree of security for the stored data.
User programs must be running from the RAM or ROM as the EEPROM will have its address and
data buses latched.
MC68HC05B6
Rev. 4.1
MEMORY AND REGISTERS
Freescale
3-5