MC68HC05B6_13 Datasheet, PDF (27/302 Pages) Freescale Semiconductor, Inc – Microcontrollers

1
1.2
Mask options for the MC68HC05B6
The MC68HC05B6 has three mask options that are programmed during manufacture and must
be specified on the order form.
• Power-on-reset delay (t_PORL) = 16 or 4064 cycles
• Automatic watchdog enable/disable following a power-on or external reset
• Watchdog enable/disable during WAIT mode
Warning: It is recommended that an external clock is always used if t_PORL is set to 16 cycles. This
will prevent any problems arising with oscillator stability when the device is put into
STOP mode.
VPP1
RESET
IRQ
OSC2
OSC1
VDD
VSS
PD0/AN0
PD1/AN1
PD2/AN2
PD3/AN3
PD4/AN4
PD5/AN5
PD6/AN6
PD7/AN7
VRH
VRL
256 bytes
EEPROM
Charge pump
COP watchdog
Oscillator
÷ 2 / ÷ 32
M68HC05
CPU
8-bit
A/D converter
5950 bytes
User ROM
(including 14 bytes
User vectors)
432 bytes
self check ROM
176 bytes
RAM
16-bit
programmable
timer
SCI
PLM
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PC0
PC1
PC2/ECLK
PC3
PC4
PC5
PC6
PC7
TCMP1
TCMP2
TCAP1
TCAP2
RDI
SCLK
TDO
PLMA D/A
PLMB D/A
MC68HC05B6
Rev. 4.1
Figure 1-1 MC68HC05B6 block diagram
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