MC68HC05B6_13 Datasheet, PDF (41/302 Pages) Freescale Semiconductor, Inc – Microcontrollers

2.5.9 RDI (Receive data in)
The RDI pin is the input pin of the SCI receiver.
2
2.5.10 TDO (Transmit data out)
The TDO pin is the output pin of the SCI transmitter.
2.5.11 SCLK
The SCLK pin is the clock output pin of the SCI transmitter.
2.5.12 PLMA
The PLMA pin is the output of pulse length modulation converter A.
2.5.13 PLMB
The PLMB pin is the output of pulse length modulation converter B.
2.5.14 VPP1
The VPP1 pin is the output of the charge pump for the EEPROM1 array.
2.5.15 VRH
The VRH pin is the positive reference voltage for the A/D converter.
2.5.16 VRL
The VRL pin is the negative reference voltage for the A/D converter.
2.5.17 PA0 – PA7/PB0 – PB7/PC0 – PC7
These 24 I/O lines comprise ports A, B and C. The state of any pin is software programmable, and
all the pins are configured as inputs during power-on or reset.
Under software control the PC2 pin can output the internal E-clock (see Section 4.2).
2.5.18 PD0/AN0–PD7/AN7
This 8-bit input only port (D) shares its pins with the A/D converter. When enabled, the A/D
converter uses pins PD0/AN0 – PD7/AN7 as its analog inputs. On reset, the A/D converter is
disabled which forces the port D pins to be input only port pins (see Section 8.5).
MC68HC05B6
Rev. 4.1
MODES OF OPERATION AND PIN DESCRIPTIONS
Freescale
2-13