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MC68HC05B6_13 Datasheet, PDF (58/302 Pages) Freescale Semiconductor, Inc – Microcontrollers
4.6
Other port considerations
All output ports can emulate ‘open-drain’ outputs. This is achieved by writing a zero to the relevant
output port latch. By toggling the corresponding data direction bit, the port pin will either be an
output zero or tri-state (an input). This is shown diagrammatically in Figure 4-3.
When using a port pin as an ‘open-drain’ output, certain precautions must be taken in the user
software. If a read-modify-write instruction is used on a port where the ‘open-drain’ is assigned
4
and the pin at this time is programmed as an input, it will read it as a ‘one’. The read-modify-write
instruction will then write this ‘one’ into the output data latch on the next cycle. This would cause
the ‘open-drain’ pin not to output a ‘zero’ when desired.
Note: ‘Open-drain’ outputs should not be pulled above VDD.
Read buffer output
(a)
A
Y
Data direction register bit DDRn
DDRn A
Y
1
0
0
1
0
1
0
1
tri state

 Normal operation – tri state

0
1 tri state 
(b)
1
0
low 
1
0
1
0
—
high

 ‘Open-drain’

0
1
high 
VDD
VDD
Px0
‘Open-drain’ output
(c)
DDRx, bit 0 = 0
Portx, bit 0 = 0
DDRx, bit 0 = 0
Portx, bit 0 = 0
Figure 4-3 Port logic levels
Freescale
4-6
INPUT/OUTPUT PORTS
MC68HC05B6
Rev. 4.1