MC68HC05B6_13 Datasheet, PDF (109/302 Pages) Freescale Semiconductor, Inc – Microcontrollers

9.1.5 Functions affected by reset
When processing stops within the MCU for any reason, i.e. power-on reset, external reset or the
execution of a STOP or WAIT instruction, various internal functions of the MCU are affected.
Table 9-1 shows the resulting action of any type of system reset, but not necessarily in the order
in which they occur.
Table 9-1 Effect of RESET, POR, STOP and WAIT
Function/effect
RESET POR WAIT STOP
Timer prescaler set to zero
x
x
–
–
Timer counter set to $FFFC
x
x
–
–
All timer enable bits cleared (disable)
x
x
–
–
Data direction registers cleared (inputs)
x
x
–
–
Stack pointer set to $00FF
x
x
–
–
Force internal address bus to restart
x
x
–
–
Vector $1FFE, $1FFF
x
x
–
–
Interrupt mask bit (I-bit CCR) set to 1
x
x
–
–
Interrupt mask bit (I-bit CCR) cleared
–
–
x
x
Set interrupt enable bit (INTE)
x
x
–
–
Set POR bit in miscellaneous register
–
x
–
–
Reset STOP latch
x
x
–
–
Reset IRQ latch
x
x
–
–
Reset WAIT latch
x
x
–
–
SCI disabled
x
x
–
–
SCI status bits cleared (except TDRE and TC)
x
x
–
–
9
SCI interrupt enable bits cleared
x
x
–
–
SCI status bits TDRE and TC set
x
x
–
–
Oscillator disabled for 4064 cycles
–
x
–
x
Timer clock cleared
–
x
–
x
SCI clock cleared
–
x
–
x
A/D disabled
x
x
–
x
SM bit in the miscellaneous register cleared
x
x
–
x
Watchdog counter reset
x
x
x
x
WDOG bit in the miscellaneous register reset
x
x
–
x
EEPROM control bits (see Section 3.5.1)
x
x
–
x
x = Described action takes place
– = Described action does not take place
MC68HC05B6
Rev. 4.1
RESETS AND INTERRUPTS
Freescale
9-5