MC68HC05B6_13 Datasheet, PDF (292/302 Pages) Freescale Semiconductor, Inc – Microcontrollers

, E1PGM – EEPROM charge pump enable/disable 3–4
, , E–7 F–7 H–10
, , E6LAT – EPROM programming latch enable bit E–6 F–6
, , ^H–9
E6PGM – EPROM program enable bit E–6 F–6 H–9
, ^{ECLK – External clock output bit 4–3}
EE1P – EEPROM protect bit E–9 F–9
, ^{EE1P – EEPROM protection bit H–12}
EEPROM 3–1 3–3
erase operation 3–5
programming operation 3–6
read operation 3–5
STOP mode 3–7
WAIT mode 3–7
EEPROM control register
E1ERA 3–3
E1LAT 3–4
E1PGM 3–4
ECLK 3–3
, EEPROM options register
EE1P E–9 F–9
SEC E–9, F–9
EEPROM/ECLK control
ECLK 4–3
ELAT – EPROM programming latch enable bit C–6
EPGM – EPROM programming bit C–6
EPP – EPROM protect C–7
EPPT – EPROM protect test bit C–6
, , , EPROM 13–2 C–5 E–5 F–5
, , control register C–6 E–6 F–6
, , ^{options register C–7}
program operation E–5 F–6 H–8
, , ^{programming operation C–5}
read operation E–5 F–5 H–8
EPROM control register
ELAT C–6
EPGM C–6
, , ^{EPPT C–6}
EPROM electrical characteristics E–28 F–26 H–29
EPROM registers C–6
EPROM/EEPROM/ECLK control register
, E1ERA E–7 F–7
, E1LAT E–7 F–7
, E1PGM E–7 F–7
, E6LAT E–6 F–6
, E6PGM E–6 F–6
, , , , external clock 2–12 D–4 E–5 F–5 G–2
external interrupt 9–7
F
FE – Framing error flag 6–17
H
high speed operation I–1
I
, ^{I/O pin states 4–2}
I/O port structure 4–2 4–2
ICF1 – Input capture flag 1 5–6
ICF2 – Input capture flag 2 5–7
IDLE – Idle line detect flag 6–16
IEDG1 – Input edge 1 5–5
ILIE – Idle line interrupt enable 6–14
Input capture registers
ICR1 5–7
ICR2 5–8
, ^{input/output programming 4–1}
INTE – External interrupt enable 3–9 9–9
interrupts
priorities 9–6
SCI 9–10
, ^{SWI 9–6}
INTP, INTN – External interrupt sensitivity options 3–9 9–9
IRQ 9–7
IRQ sensitivity 9–9
L
LBCL – Last bit clock
low power modes
SLOW 2–9
STOP 2–6
WAIT 2–8
6–13
M
M – Mode 6–11
Mask option register
, , PBPD E–8 F–8 H–11
, , PCPD E–8 F–9 H–11
, , RTIM E–8 F–8 H–11
, , RWAT E–8 F–8 H–11
, , WWAT E–8 F–8 H–11
mask options
MC68HC05B6 1–3
, ^{maskable hardware interrupts 9–7}
maskset errata D–1 H–1
MC68HC05B16 D–1
block diagram D–3
memory map D–5
MC68HC05B32 G–1
block diagram G–2
memory map G–3
MC68HC05B4
block diagram A–2
memory map A–3
MC68HC05B6
block diagram 1–3
mask options 1–3
, , ^{memory map 3–2}
pinouts 12–1 12–2 12–3
Freescale
vi
INDEX
MC68HC05B6