MC68HC05B6_13 Datasheet, PDF(206/302 Page) Freescale Semiconductor, Inc – Microcontrollers

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MC68HC05B6_13 Datasheet, PDF (206/302 Pages) Freescale Semiconductor, Inc – Microcontrollers

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4) The exchange of data continues until the MC68HC705B16 has sent the four

data bytes and the host has sent the 2 address data bytes and 4 data bytes.

5) If the data is different from $00 for EPROM or $FF for EEPROM, it is

programmed at the address provided, while the next address and bytes are

received and the previous data is echoed.

6) Loop to 1.

After reset, the MC68HC705B16 serial bootstrap routine will first echo two blocks of four bytes at

$00, as no data is programmed yet.

If the data received is $00 for EPROM locations or $FF for EEPROM locations, no programming

in the EPROM and EEPROM1 takes place, and the contents of the accessed location are returned

as a prompt. The entire EPROM/EEPROM memory can be read in this fashion (serial dump).

Warning: When using this function with a programmed device, the device must be placed into

RAM/EPROM/EEPROM serial bootstrap mode without EPROM erase check (PD4 = 1).

Serial RAM loading and execute can be accomplished in this mode. A RAM byte will be written if

the address sent by the host in the serial protocol points to the RAM.

RAM bytes $008Bâ$00E3 and $0250â$02ED are available for user test programs. A 10-byte stack

resides at the top of RAMI, allowing, for example, one interrupt and two sub-routine levels. The

RAM addresses between $0050 and $008A are used by the loader and are therefore not available

to the user during serial loading/executing.

If the SEC bit is at â1â, program execution is triggered by sending a negative (bit 7 set) high

address; execution starts at address XADR ($008B).

In the RAM bootloader mode, all interrupt vectors are mapped to pseudo-vectors in RAM (see

Table E-5). This allows programmers to use their own service-routine addresses. Each

pseudo-vector is allowed three bytes of space rather than the two bytes for normal vectors,

because an explicit jump (JMP) opcode is needed to cause the desired jump to the userâs service

routine address.

14

Table E-5 Bootstrap vector targets in RAM

Vector targets in RAM

SCI interrupt

Timer overflow

Timer output compare

Timer input capture

IRQ

SWI

$02EE

$02F1

$02F4

$02F7

$02FA

$02FD

Freescale

E-18

MC68HC705B16

MC68HC05B6

Rev. 4.1

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