MC68HC908LJ24 Datasheet, PDF (77/464 Pages) Motorola, Inc – Microcontrollers

FLASH Memory (FLASH)
FLASH Block Protection
4.8.1 FLASH Block Protect Register
The FLASH block protect register (FLBPR) is implemented as a byte
within the FLASH memory, and therefore can only be written during a
programming sequence of the FLASH memory. The value in this register
determines the starting location of the protected range within the FLASH
memory.
Address: $FFCF
Bit 7
6
5
4
3
2
1
Read:
BPR7
Write:
BPR6
BPR5
BPR4
BPR3
BPR2
BPR1
Reset:
Unaffected by reset; $FF when blank
Non-volatile FLASH register; write by programming.
Figure 4-4. FLASH Block Protect Register (FLBPR)
Bit 0
BPR0
BPR[7:0] — FLASH Block Protect Bits
BPR[7:0] represent bits [14:7] of a 16-bit memory address. Bits
[15:14] are logic 1’s and bits [6:0] are logic 0’s.
Start address of FLASH block protect 1
16-bit memory address
0000000
BPR[7:0]
The resultant 16-bit address is used for specifying the start address
of the FLASH memory for block protection. The FLASH is protected
from this start address to the end of FLASH memory, at $FFFF. With
this mechanism, the protect start address can be $XX00 or $XX80 (at
page boundaries — 128 bytes) within the FLASH memory.
Examples of protect start address is shown in Table 4-1:
MC68HC908LJ24/LK24 — Rev. 2.1
Freescale Semiconductor
FLASH Memory (FLASH)
Data Sheet
77