MC68HC908LJ24 Datasheet, PDF (70/464 Pages) Motorola, Inc – Microcontrollers

FLASH Memory (FLASH)
Addr.
Register Name
Bit 7
Read: 0
$FE08
FLASH Control Register
(FLCR)
Write:
Reset: 0
$FFCF
FLASH Block Protect ^Read:
Register Write:
(FLBPR)^# _Reset:
BPR7
# Non-volatile FLASH register; write by programming.
6
0
0
BPR6
5
4
3
2
0
0
HVEN MASS
0
0
0
0
BPR5 BPR4 BPR3 BPR2
Unaffected by reset; $FF when blank
= Unimplemented
1
ERASE
0
BPR1
Bit 0
PGM
0
BPR0
Figure 4-1. FLASH I/O Register Summary
4.3 Functional Description
The FLASH memory consists of an array of 24,576 bytes for user
memory plus a block of 48 bytes for user interrupt vectors. An erased bit
reads as logic 1 and a programmed bit reads as a logic 0. The FLASH
memory page size is defined as 128 bytes, and is the minimum size that
can be erased in a page erase operation. Program and erase operations
are facilitated through control bits in FLASH control register (FLCR). The
address ranges for the FLASH memory are:
• $9000–$EFFF; user memory, 24,576 bytes
• $FFD0–$FFFF; user interrupt vectors, 48 bytes
NOTE:
Programming tools are available from Freescale. Contact your local
Freescale representative for more information.
A security feature prevents viewing of the FLASH contents.¹
Data Sheet
70
1. No security feature is absolutely secure. However, Freescale’s strategy is to make reading or
copying the FLASH difficult for unauthorized users.
FLASH Memory (FLASH)
MC68HC908LJ24/LK24 — Rev. 2.1
Freescale Semiconductor