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MC68HC908LJ24 Datasheet, PDF (343/464 Pages) Motorola, Inc – Microcontrollers
Analog-to-Digital Converter (ADC)
I/O Registers
ADCO — ADC Continuous Conversion Bit
When set, the ADC will convert samples continuously and update the
ADC data register at the end of each conversion. Only one conversion
is allowed when this bit is cleared. Reset clears the ADCO bit.
1 = Continuous ADC conversion
0 = One ADC conversion
ADCH[4:0] — ADC Channel Select Bits
ADCH[4:0] form a 5-bit field which is used to select one of the ADC
channels when not in auto-scan mode. The five channel select bits
are detailed in Table 16-1.
NOTE:
Care should be taken when using a port pin as both an analog and a
digital input simultaneously to prevent switching noise from corrupting
the analog signal.
Recovery from the disabled state requires one conversion cycle to
stabilize.
Table 16-1. MUX Channel Select
ADCH4 ADCH3 ADCH2 ADCH1 ADCH0 ADC Channel
Input Select
0
0
0
0
0
ADC0
PTA4
0
0
0
0
1
ADC1
PTA5
0
0
0
1
0
ADC2
PTA6
0
0
0
1
1
ADC3
PTA7
0
0
1
0
0
ADC4
PTB6
0
0
1
0
1
ADC5
PTB7
0
0
1
1
0
ADC6
1.2V Bandgap reference
0
0
1
1
1
ADC7
VLCD
0
1
0
0
0
ADC8
↓
↓
↓
↓
↓
↓
Reserved
1
1
1
0
0
ADC28
1
1
1
0
1
ADC29
VREFH (see Note 2)
1
1
1
1
0
ADC30
VREFL (see Note 2)
1
1
1
1
1
ADC powered-off
—
NOTES:
1. If any reserved channels are selected, the resulting ADC conversion will be unknown.
2. The voltage levels supplied from internal reference nodes as specified in the table are used to verify the operation of
the ADC converter both in production test and for user applications.
MC68HC908LJ24/LK24 — Rev. 2.1
Freescale Semiconductor
Analog-to-Digital Converter (ADC)
Data Sheet
343