MC68HC908LJ24 Datasheet, PDF (319/464 Pages) Motorola, Inc – Microcontrollers

Data Sheet — MC68HC908LJ24
Section 15. Multi-Master IIC Interface (MMIIC)
15.1 Contents
15.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 319
15.3 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 320
15.4 I/O Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 320
15.5 Multi-Master IIC Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . 321
15.5.1 Multi-Master IIC Address Register (MMADR) . . . . . . . . . . 321
15.5.2 Multi-Master IIC Control Register (MMCR) . . . . . . . . . . . . 323
15.5.3 Multi-Master IIC Master Control Register (MIMCR) . . . . . . 324
15.5.4 Multi-Master IIC Status Register (MMSR) . . . . . . . . . . . . . 326
15.5.5 Multi-Master IIC Data Transmit Register (MMDTR) . . . . . . 328
15.5.6 Multi-Master IIC Data Receive Register (MMDRR) . . . . . . 329
15.6 Programming Considerations . . . . . . . . . . . . . . . . . . . . . . . . . 330
15.2 Introduction
This Multi-master IIC (MMIIC) Interface is designed for internal serial
communication between the MCU and other IIC devices. A hardware
circuit generates "start" and "stop" signal, while byte by byte data
transfer is interrupt driven by the software algorithm. Therefore, it can
greatly help the software in dealing with other devices to have higher
system efficiency in a typical digital monitor system.
This module not only can be applied in internal communications, but can
also be used as a typical command reception serial bus for factory setup
and alignment purposes. It also provides the flexibility of hooking
additional devices to an existing system for future expansion without
adding extra hardware.
MC68HC908LJ24/LK24 — Rev. 2.1
Freescale Semiconductor
Multi-Master IIC Interface (MMIIC)
Data Sheet
319