MC68HC908LJ24 Datasheet, PDF (197/464 Pages) Motorola, Inc – Microcontrollers

Timer Interface Module (TIM)
Functional Description
Addr.
Register Name
Bit 7
6
5
4
3
2
Timer 1 Status and ^{Read: TOF}
TOIE TSTOP
0
0
PS2
$0020
Control Register Write: 0
TRST
(T1SC) _Reset:
0
0
1
0
0
0
$0021
Timer 1 Counter ^{Read: Bit 15}
14
13
12
11
10
Register High Write:
(T1CNTH) _Reset:
0
0
0
0
0
0
$0022
Timer 1 Counter ^{Read: Bit 7}
6
5
4
3
2
Register Low Write:
(T1CNTL) _Reset:
0
0
0
0
0
0
Timer 1 Counter Modulo ^Read: _{Bit 15}
14
13
12
11
10
$0023
Register High Write:
(T1MODH) _Reset:
1
1
1
1
1
1
Timer 1 Counter Modulo ^Read: _{Bit 7}
6
5
4
3
2
$0024
Register Low Write:
(T1MODL) _Reset:
1
1
1
1
1
1
Timer 1 Channel 0 Status ^Read:
$0025
and Control Register Write:
(T1SC0) _Reset:
CH0F
0
0
CH0IE
0
MS0B
0
MS0A
0
ELS0B ELS0A
0
0
$0026
$0027
Timer 1 Channel 0 ^Read: _{Bit 15}
14
Register High Write:
(T1CH0H) _Reset:
Timer 1 Channel 0 ^Read: _{Bit 7}
6
Register Low Write:
(T1CH0L) _Reset:
13
12
11
10
Indeterminate after reset
5
4
3
2
Indeterminate after reset
Timer 1 Channel 1 Status ^{Read: CH1F}
CH1IE
0
MS1A ELS1B ELS1A
$0028
and Control Register Write: 0
(T1SC1) _Reset:
0
0
0
0
0
0
= Unimplemented
Figure 11-2. TIM I/O Register Summary (Sheet 1 of 3)
1
Bit 0
PS1
PS0
0
0
9
Bit 8
0
0
1
Bit 0
0
0
9
Bit 8
1
1
1
Bit 0
1
1
TOV0 CH0MAX
0
0
9
Bit 8
1
Bit 0
TOV1 CH1MAX
0
0
MC68HC908LJ24/LK24 — Rev. 2.1
Freescale Semiconductor
Timer Interface Module (TIM)
Data Sheet
197