MC68HC908LJ24 Datasheet, PDF (151/464 Pages) Motorola, Inc – Microcontrollers

System Integration Module (SIM)
Exception Control
Interrupts are latched, and arbitration is performed in the SIM at the start
of interrupt processing. The arbitration result is a constant that the CPU
uses to determine which vector to fetch. Once an interrupt is latched by
the SIM, no other interrupt can take precedence, regardless of priority,
until the latched interrupt is serviced (or the I bit is cleared).
(See Figure 9-10.)
FROM RESET
I BBIRTESAEKT?
INTERRUPT?
YES
NO
YES
I-BIT SET?
NO
IRQ
INTERRUPT?
YES
NO
AS MANY INTERRUPTS
AS EXIST ON CHIP
STACK CPU REGISTERS
SET I-BIT
LOAD PC WITH INTERRUPT VECTOR
FETCH NEXT
INSTRUCTION
SWI
YES
INSTRUCTION?
NO
RTI
YES
INSTRUCTION?
UNSTACK CPU REGISTERS
NO
EXECUTE INSTRUCTION
Figure 9-10. Interrupt Processing
MC68HC908LJ24/LK24 — Rev. 2.1
Freescale Semiconductor
System Integration Module (SIM)
Data Sheet
151