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MC68HC908LJ24 Datasheet, PDF (440/464 Pages) Motorola, Inc – Microcontrollers
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Electrical Specifications
Table 24-5. 3.3V DC Electrical Characteristics
Characteristic(1)
Symbol
Min
Typ(2)
Max
Unit
Capacitance
Ports (as input or output)
COUT
—
CIN
—
—
—
12
8
pF
POR re-arm voltage(7)
VPOR
0
—
100
mV
POR rise-time ramp rate(8)
RPOR
0.02
—
—
V/ms
Monitor mode entry voltage (at IRQ pin)
VHI
1.5 × VDD
—
8
V
Pullup resistors(9)
PTA0–PTA3 and PTD4–PTD7 as KBI0–KBI7
RST, IRQ
Low-voltage inhibit, trip falling voltage
RPU1
21
30
39
kΩ
RPU2
21
30
39
kΩ
VTRIPF
2.1
—
2.8
V
Low-voltage inhibit, trip rising voltage
VTRIPR
2.2
—
2.9
V
Notes:
1. VDD = 3.0 to 3.6 Vdc, VSS = 0 Vdc, TA = TL to TH, unless otherwise noted.
2. Typical values reflect average measurements at midpoint of voltage range, 25 °C only.
3. Run (operating) IDD measured using external square wave clock source. All inputs 0.2 V from rail. No dc loads. Less than
100 pF on all outputs. CL = 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly affects run IDD.
4. Wait IDD measured using external square wave clock source. All inputs 0.2 V from rail. No dc loads. Less than 100 pF on
all outputs. CL = 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly affects wait IDD.
5. The 8kHz clock is from a 32kHz external square wave clock input at OSC1, for the driving the RTC. Due to loading effects,
the IDD values will be larger when a 32kHz crystal circuit is connected.
6. LCD driver configured for low current mode.
7. Maximum is highest voltage that POR is guaranteed.
8. If minimum VDD is not reached before the internal POR reset is released, RST must be driven low externally until minimum
VDD is reached.
9. RPU1 and RPU2 are measured at VDD = 3.3V.
24.8 5V Control Timing
Table 24-6. 5V Control Timing
Characteristic(1)
Symbol
Min
Max
Unit
Internal operating frequency(2)
fOP
—
8
MHz
RST input pulse width low(3)
tIRL
750
—
ns
Notes:
1. VSS = 0 Vdc; timing shown with respect to 20% VDD and 70% VDD, unless otherwise noted.
2. Some modules may require a minimum frequency greater than dc for proper operation; see appropriate table for this
information.
3. Minimum pulse width reset is guaranteed to be recognized. It is possible for a smaller pulse width to cause a reset.
Data Sheet
440
Electrical Specifications
MC68HC908LJ24/LK24 — Rev. 2.1
Freescale Semiconductor
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