MC68HC908LJ24 Datasheet, PDF (393/464 Pages) Motorola, Inc – Microcontrollers

Input/Output (I/O) Ports
Port D
When DDRDx is a logic 1, reading address $0003 reads the PTDx data
latch. When DDRDx is a logic 0, reading address $0003 reads the
voltage level on the pin. The data latch can always be written, regardless
of the state of its data direction bit.
Table 18-5 summarizes the operation of the port D pins.
Table 18-5. Port D Pin Functions
DDRD
Bit
0
PTD Bit
X⁽¹⁾
I/O Pin Mode
Input, Hi-Z⁽²⁾
Accesses to DDRD
Read/Write
DDRD[7:0]
1
X
Output
DDRD[7:0]
Notes:
1. X = don’t care.
2. Hi-Z = high impedance.
3. Writing affects data register, but does not affect input.
Accesses to PTD
Read
Pin
Write
PTD[7:0]⁽³⁾
PTD[7:0] PTD[7:0]
MC68HC908LJ24/LK24 — Rev. 2.1
Freescale Semiconductor
Input/Output (I/O) Ports
Data Sheet
393