MC68HC908LJ24 Datasheet, PDF (234/464 Pages) Motorola, Inc – Microcontrollers

Real Time Clock (RTC)
12.10.3 RTC Control Register 1 (RTCCR1)
The RTC control register 1 (RTCCR1) contains the eight interrupt enable
bits for RTC interrupt functions.
Address: $0042
Read:
ALMIE
Write:
Reset: 0
CHRIE
0
DAYIE
0
HRIE
0
MINIE SECIE TB1IE
0
0
0
TB2IE
0
Figure 12-8. RTC Control Register 1 (RTCCR1)
ALMIE — Alarm Interrupt Enable
This read/write bit enables the alarm flag, ALMF, to generate CPU
interrupt requests. Reset clears the ALMIE bit.
1 = ALMF enabled to generate CPU interrupt
0 = ALMF not enabled to generate CPU interrupt
CHRIE — Chronograph Interrupt Enable
This read/write bit enables the chronograph flag, CHRF, to generate
CPU interrupt requests. Reset clears the CHRIE bit.
1 = CHRF enabled to generate CPU interrupt
0 = CHRF not enabled to generate CPU interrupt
DAYIE — Day Interrupt Enable
This read/write bit enables the day flag, DAYF, to generate CPU
interrupt requests. Reset clears the DAYIE bit.
1 = DAYF enabled to generate CPU interrupt
0 = DAYF not enabled to generate CPU interrupt
HRIE — Hour Interrupt Enable
This read/write bit enables the hour flag, HRF, to generate CPU
interrupt requests. Reset clears the HRIE bit.
1 = HRF enabled to generate CPU interrupt
0 = HRF not enabled to generate CPU interrupt
MINIE — Minute Interrupt Enable
This read/write bit enables the minute flag, MINF, to generate CPU
interrupt requests. Reset clears the MINIE bit.
1 = MINF enabled to generate CPU interrupt
0 = MINF not enabled to generate CPU interrupt
Data Sheet
234
Real Time Clock (RTC)
MC68HC908LJ24/LK24 — Rev. 2.1
Freescale Semiconductor