MC68HC908LJ24 Datasheet, PDF (398/464 Pages) Motorola, Inc – Microcontrollers

Input/Output (I/O) Ports
18.8.2 Data Direction Register F (DDRF)
Data direction register F determines whether each port F pin is an input
or an output. Writing a logic 1 to a DDRF bit enables the output buffer for
the corresponding port F pin; a logic 0 disables the output buffer.
NOTE:
For those devices packaged in a 64-pin package, PTF0–PTF7 are
connected to ground internally. DDRF0–DDRF7 should be set to a 0 to
configure PTF0–PTF7 as inputs.
Address: $000B
Bit 7
Read:
DDRF7
Write:
6
DDRF6
5
DDRF5
4
DDRF4
3
DDRF3
2
DDRF2
1
DDRF1
Reset: 0
0
0
0
0
0
0
Figure 18-21. Data Direction Register F (DDRF)
Bit 0
DDRF0
0
DDRF[7:0] — Data Direction Register F Bits
These read/write bits control port F data direction. Reset clears
DDRF[7:0], configuring all port F pins as inputs.
1 = Corresponding port F pin configured as output
0 = Corresponding port F pin configured as input
NOTE:
Avoid glitches on port F pins by writing to the port F data register before
changing data direction register F bits from 0 to 1. Figure 18-22 shows
the port F I/O logic.
READ DDRF ($000B)
WRITE DDRF ($000B)
RESET
DDRFx
WRITE PTF ($000A)
PTFx
PTFx
READ PTF ($000A)
Data Sheet
398
Figure 18-22. Port F I/O Circuit
Input/Output (I/O) Ports
MC68HC908LJ24/LK24 — Rev. 2.1
Freescale Semiconductor