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MC9S12E256 Datasheet, PDF (579/602 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers
A.4.1.4 Mass Erase
Erasing a NVM block takes:
tm
ass
≈
20000
⋅
-----------1-------------
fNVMOP
The setup times can be ignored for this operation.
Appendix A Electrical Characteristics
A.4.1.5 Blank Check
The time it takes to perform a blank check on the Flash is dependant on the location of the first non-blank
word starting at relative address zero. It takes one bus cycle per word to verify plus a setup of the command.
tcheck ≈ location ⋅ tcyc + 10 ⋅ tcyc
Table A-14. NVM Timing Characteristics
Conditions are shown in Table A-4 unless otherwise noted
Num C
Rating
Symbol
Min
Typ
Max
Unit
1 D External Oscillator Clock
fNVMOSC
0.5
—
501
MHz
2
D Bus frequency for Programming or Erase Operations fNVMBUS
1
—
—
MHz
3 D Operating Frequency
fNVMOP
150
—
200
kHz
4
P Single Word Programming Time
tswpgm
462
—
74.53
µs
5 D Flash Burst Programming consecutive word
tbwpgm
20.42
—
313
µs
6 D Flash Burst Programming Time for 64 Word row
tbrpgm
1331.22 — 2027.53
µs
7
P Sector Erase Time
tera
204
—
26.73
ms
8
P Mass Erase Time
tmass
1004
—
1333
ms
9 D Blank Check Time Flash per block
t check
115
—
655466
7tcyc
1 Restrictions for oscillator in crystal mode apply!
2 Minimum Programming times are achieved under maximum NVM operating frequency fNVMOP and maximum bus frequency
fbus.
3 Maximum Erase and Programming times are achieved under particular combinations of fNVMOP and bus frequency f bus. Refer
to formulae in Section A.4.1.1, “Single Word Programming” through Section A.4.1.4, “Mass Erase” for guidance.
4 Minimum Erase times are achieved under maximum NVM operating frequency fNVMOP.
5 Minimum time, if first word in the array is not blank
6 Maximum time to complete check on an erased block
7 Where tcyc is the system bus clock period.
MC9S12E256 Data Sheet, Rev. 1.08
Freescale Semiconductor
579