MC9S12E256 Datasheet, PDF (138/602 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 3 Port Integration Module (PIM9E256V1)
3.3.2.4 Port M Reduced Drive Register (RDRM)
R
W
Reset
7
RDRM7
0
6
5
4
3
2
0
RDRM6
RDRM5
RDRM4
RDRM3
0
0
0
0
0
= Reserved or Unimplemented
Figure 3-13. Port M Reduced Drive Register (RDRM)
1
RDRM1
0
0
RDRM0
0
Read: Anytime. Write: Anytime.
This register configures the drive strength of configured output pins as either full or reduced. If a pin is
configured as input, the corresponding Reduced Drive Register bit has no effect.
Table 3-10. RDRM Field Descriptions
Field
Description
7:3, 1:0 Reduced Drive Port M
RDRM[7:3, 0 Full drive strength at output
1:0]
1 Associated pin drives at about 1/3 of the full drive strength.
3.3.2.5 Port M Pull Device Enable Register (PERM)
R
W
Reset
7
PERM7
0
6
5
4
3
2
0
PERM6
PERM5
PERM4
PERM3
0
0
0
0
0
= Reserved or Unimplemented
Figure 3-14. Port M Pull Device Enable Register (PERM)
1
PERM1
0
0
PERM0
0
Read: Anytime. Write: Anytime.
This register configures whether a pull-up or a pull-down device is activated on configured input or
wired-OR output pins. If a pin is configured as push-pull output, the corresponding Pull Device Enable
Register bit has no effect.
Table 3-11. PERM Field Descriptions
Field
7:3, 1:0 Pull Device Enable Port M
PERM[7:3, 0 Pull-up or pull-down device is disabled.
1:0]
1 Pull-up or pull-down device is enabled.
Description
MC9S12E256 Data Sheet, Rev. 1.08
138
Freescale Semiconductor