MC9S12E256 Datasheet, PDF (363/602 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 11 Pulse Width Modulator with Fault Protection (PMF15B6CV2)
PWM0
PWM1
POSITIVE
CURRENT
NEGATIVE
CURRENT
D
Q
DT0
PWM0
CLK
IS0 PIN
VOLTAGE
SENSOR
D
Q
DT1
PWM1
CLK
Figure 11-55. Current-Status Sense Scheme for Deadtime Correction
If both D flip-flops latch low, DT0 = 0, DT1 = 0, during deadtime periods if current is large and flowing
out of the complementary circuit. See Figure 11-55. If both D flip-flops latch the high, DT0 = 1, DT1 = 1,
during deadtime periods if current is also large and flowing into the complementary circuit. However,
under low-current, the output voltage of the complementary circuit during deadtime is somewhere between
the high and low levels. The current cannot free-wheel throughout the opposition anti-body diode,
regardless of polarity, giving additional distortion when the current crosses zero. Sampled results will be
DT0 = 0 and DT1 = 1. Thus, the best time to change one PWM value register to another is just before the
current zero crossing.
T
B
T
B
DEADTIME
PWM TO TOP
TRANSISTOR
V+
POSITIVE
CURRENT
PWM TO BOTTOM
TRANSISTOR
LOAD VOLTAGE WITH
HIGH POSITIVE CURRENT
NEGATIVE
CURRENT
LOAD VOLTAGE WITH
LOW POSITIVE CURRENT
LOAD VOLTAGE WITH
HIGH NEGATIVE CURRENT
LOAD VOLTAGE WITH
NEGATIVE CURRENT
T = DEADTIME INTERVAL BEFORE ASSERTION OF TOP PWM
B = DEADTIME INTERVAL BEFORE ASSERTION OF BOTTOM PWM
Figure 11-56. Output Voltage Waveforms
MC9S12E256 Data Sheet, Rev. 1.08
Freescale Semiconductor
363