MC9S12E256 Datasheet, PDF (447/602 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 15 Background Debug Module (BDMV4)
15.1.2.2 Secure Mode Operation
If the part is in secure mode, the operation of the BDM is reduced to a small subset of its regular run mode
operation. Secure operation prevents access to FLASH or EEPROM other than allowing erasure.
15.2 External Signal Description
A single-wire interface pin is used to communicate with the BDM system. Two additional pins are used
for instruction tagging. These pins are part of the multiplexed external bus interface (MEBI) sub-block and
all interfacing between the MEBI and BDM is done within the core interface boundary. Functional
descriptions of the pins are provided below for completeness.
• BKGD — Background interface pin
• TAGHI — High byte instruction tagging pin
• TAGLO — Low byte instruction tagging pin
• BKGD and TAGHI share the same pin.
• TAGLO and LSTRB share the same pin.
NOTE
Generally these pins are shared as described, but it is best to check
Chapter 1, “MC9S12E256 Device Overview (MC9S12E256DGV1)” to
make certain. All MCUs at the time of this writing have followed this pin
sharing scheme.
15.2.1 BKGD — Background Interface Pin
Debugging control logic communicates with external devices serially via the single-wire background
interface pin (BKGD). During reset, this pin is a mode select input which selects between normal and
special modes of operation. After reset, this pin becomes the dedicated serial interface pin for the
background debug mode.
15.2.2 TAGHI — High Byte Instruction Tagging Pin
This pin is used to tag the high byte of an instruction. When instruction tagging is on, a logic 0 at the falling
edge of the external clock (ECLK) tags the high half of the instruction word being read into the instruction
queue.
15.2.3 TAGLO — Low Byte Instruction Tagging Pin
This pin is used to tag the low byte of an instruction. When instruction tagging is on and low strobe is
enabled, a logic 0 at the falling edge of the external clock (ECLK) tags the low half of the instruction word
being read into the instruction queue.
MC9S12E256 Data Sheet, Rev. 1.08
Freescale Semiconductor
447