MC9S12E256 Datasheet, PDF (370/602 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 11 Pulse Width Modulator with Fault Protection (PMF15B6CV2)
11.4.7.3 Reload Flag
With a reload opportunity, regardless an actual reload occurs as determined by LDOK bit, the PWMF
reload flag is set. If the PWM reload interrupt enable bit, PWMRIE is set, the PWMF flag generates CPU
interrupt requests allowing software to calculate new PWM parameters in real time. When PWMRIE is
not set, reloads still occur at the selected reload rate without generating CPU interrupt requests.
READ PWMRF AS 1 THEN
WRITE 0 TO PWMF
RESET
PWM Reload
Vdd
CLR
D
Q
CLK
PWMRF
PWMRIE
CPU Interrupt
Request
Figure 11-67. PWMRF Reload Interrupt Request
HALF = 0, LDFQ[3:0] = 00 = Reload every cycle
UP/DOWN
COUNTER
LDOK = 1
0
1
0
MODULUS = 3
3
3
3
PWM VALUE = 1
2
2
1
PWMRF = 1
1
1
1
PWM
Figure 11-68. Full-Cycle Center-Aligned PWM Value Loading
HALF = 0, LDFQ[3:0] = 00 = Reload every cycle
Up/Down
COUNTER
LDOK = 1
1
MODULUS = 2
3
PWM VALUE = 1
1
PWMRF = 1
1
1
1
0
2
1
2
1
1
1
1
1
1
PWM
Figure 11-69. Full-Cycle Center-Aligned Modulus Loading
MC9S12E256 Data Sheet, Rev. 1.08
370
Freescale Semiconductor