MC9S12E256 Datasheet, PDF (526/602 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 18 Multiplexed External Bus Interface (MEBIV3)
Table 18-7. MODE Field Descriptions (continued)
Field
3
IVIS
1
EMK
0
EME
Description
Internal Visibility (for both read and write accesses) — This bit determines whether internal accesses
generate a bus cycle that is visible on the external bus.
Normal: write once
Emulation: write never
Special: write anytime
0 No visibility of internal bus operations on external bus.
1 Internal bus operations are visible on external bus.
Emulate Port K
Normal: write once
Emulation: write never
Special: write anytime
0 PORTK and DDRK are in the memory map so port K can be used for general-purpose I/O.
1 If in any expanded mode, PORTK and DDRK are removed from the memory map.
In single-chip modes, PORTK and DDRK are always in the map regardless of the state of this bit.
In special peripheral mode, PORTK and DDRK are never in the map regardless of the state of this bit.
Emulate Port E
Normal and Emulation: write never
Special: write anytime
0 PORTE and DDRE are in the memory map so port E can be used for general-purpose I/O.
1 If in any expanded mode or special peripheral mode, PORTE and DDRE are removed from the memory map.
Removing the registers from the map allows the user to emulate the function of these registers externally.
In single-chip modes, PORTE and DDRE are always in the map regardless of the state of this bit.
Table 18-8. MODC, MODB, and MODA Write Capability^a
MODC MODB MODA
Mode
MODx Write Capability
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
Special single chip
Emulation narrow
Special test
Emulation wide
Normal single chip
MODC, MODB, and MODA
write anytime but not to 110^b
No write
MODC, MODB, and MODA
write anytime but not to 110²
No write
MODC write never,
MODB and MODA write once
but not to 110
1
0
1
Normal expanded narrow
No write
1
1
0
Special peripheral
No write
1
1
1
Normal expanded wide
No write
a _{No writes to the MOD bits are allowed while operating in a secure mode. For more details, refer to Chapter 1, “MC9S12E256}
Device Overview (MC9S12E256DGV1)”.
b _{If you are in a special single-chip or special test mode and you write to this register, changing to normal single-chip mode, then}
one allowed write to this register remains. If you write to normal expanded or emulation mode, then no writes remain.
MC9S12E256 Data Sheet, Rev. 1.08
526
Freescale Semiconductor