MC9S12E256 Datasheet, PDF (132/602 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 3 Port Integration Module (PIM9E256V1)
3.3.1.4 Port AD Reduced Drive Register (RDRAD)
R
W
Reset
7
RDRAD15
0
R
W
Reset
7
RDRAD7
0
6
RDRAD14
5
RDRAD13
4
RDRAD12
3
RDRAD11
2
RDRAD10
0
6
RDRAD6
0
5
RDRAD5
0
4
RDRAD4
0
3
RDRAD3
0
2
RDRAD2
0
0
0
0
0
Figure 3-5. Port AD Reduced Drive Register (RDRAD)
1
RDRAD9
0
1
RDRAD1
0
0
RDRAD8
0
0
RDRAD0
0
Read: Anytime. Write: Anytime.
This register configures the drive strength of configured output pins as either full or reduced. If a pin is
configured as input, the corresponding Reduced Drive Register bit has no effect.
Table 3-4. RDRAD Field Descriptions
Field
Description
15:0
Reduced Drive Port AD
RDRAD[15:0] 0 Full drive strength at output.
1 Associated pin drives at about 1/3 of the full drive strength.
3.3.1.5 Port AD Pull Device Enable Register (PERAD)
R
W
Reset
7
PERAD15
0
6
PERAD14
0
5
PERAD13
0
4
PERAD12
0
3
PERAD11
0
2
PERAD10
0
1
PERAD9
0
0
PERAD8
0
7
R
PERAD7
W
6
PERAD6
5
PERAD5
4
PERAD4
3
PERAD3
2
PERAD2
Reset
0
0
0
0
0
0
Figure 3-6. Port AD Pull Device Enable Register (PERAD)
Read: Anytime. Write: Anytime.
1
PERAD1
0
0
PERAD0
0
This register configures whether a pull-up or a pull-down device is activated on configured input pins. If
a pin is configured as output, the corresponding Pull Device Enable Register bit has no effect.
Table 3-5. PERAD Field Descriptions
Field
15:0
Pull Device Enable Port AD
PERAD[15:0] 0 Pull-up or pull-down device is disabled.
1 Pull-up or pull-down device is enabled.
Description
MC9S12E256 Data Sheet, Rev. 1.08
132
Freescale Semiconductor