MC9S12E256 Datasheet, PDF (439/602 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 14 Dual Output Voltage Regulator (VREG3V3V2)
14.2 External Signal Description
Due to the nature of VREG being a voltage regulator providing the chip internal power supply voltages
most signals are power supply signals connected to pads.
Table 14-1 shows all signals of VREG associated with pins.
Table 14-1. VREG — Signal Properties
Name
V_DDR
V_DDA
V_SSA
V_DD
V_SS
V_DDPLL
V_SSPLL
V_REGEN (optional)
Port
Function
— VREG power input (positive supply)
— VREG quiet input (positive supply)
— VREG quiet input (ground)
— VREG primary output (positive supply)
— VREG primary output (ground)
— VREG secondary output (positive supply)
— VREG secondary output (ground)
— VREG (Optional) Regulator Enable
Reset State
—
—
—
—
—
—
—
—
Pull Up
—
—
—
—
—
—
—
—
NOTE
Check Chapter 1, “MC9S12E256 Device Overview
(MC9S12E256DGV1)” for connectivity of the signals.
14.2.1 V_DDR — Regulator Power Input
Signal V_DDR is the power input of VREG. All currents sourced into the regulator loads flow through this
pin. A chip external decoupling capacitor (100 nF...220 nF, X7R ceramic) between V_DDR and V_SSR can
smoothen ripple on V_DDR.
For entering shutdown mode, pin V_DDR should also be tied to ground on devices without a V_REGEN pin.
14.2.2 V_DDA, V_SSA — Regulator Reference Supply
Signals V_DDA/V_SSA which are supposed to be relatively quiet are used to supply the analog parts of the
regulator. Internal precision reference circuits are supplied from these signals. A chip external decoupling
capacitor (100 nF...220 nF, X7R ceramic) between V_DDA and V_SSA can further improve the quality of this
supply.
MC9S12E256 Data Sheet, Rev. 1.08
Freescale Semiconductor
439