MC9S12E256 Datasheet, PDF (574/602 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Appendix A Electrical Characteristics
A.3.3 Phase Locked Loop
The oscillator provides the reference clock for the PLL. The PLL´s Voltage Controlled Oscillator (VCO)
is also the system clock source in self clock mode.
A.3.3.1 XFC Component Selection
This section describes the selection of the XFC components to achieve a good filter characteristics.
C_p
VDDPLL
C_s
R
Phase
XFC Pin
VCO
f_osc
1
f_ref
refdv+1
∆
K_Φ
f_vco
K_V
Detector
f_cmp
Loop Divider
1
1
synr+1
2
Figure A-2. Basic PLL Functional Diagram
The following procedure can be used to calculate the resistance and capacitance values using typical values
for K₁, f₁ and i_ch from Table A-13.
The grey boxes show the calculation for f_VCO = 50MHz and f_ref = 1MHz. E.g., these frequencies are used
for f_OSC = 4MHz and a 25MHz bus clock.
The VCO Gain at the desired VCO frequency is approximated by:
KV
=
-⁽--f--1-----^–----f--v---c----o----⁾
K1 ⋅ e ^{K1 ⋅ 1V}
=
–100
-⁽--⁶---⁰-----–-----⁵---⁰----⁾
⋅ e ^–100
= -90.48MHz/V
The phase detector relationship is given by:
K_Φ = – ich ⋅ KV
i_ch is the current in tracking mode.
= 316.7Hz/Ω
MC9S12E256 Data Sheet, Rev. 1.08
574
Freescale Semiconductor